In automotive applications, the use of Direct Current (DC) or Brushless DC (BLDC) motors for fan, pump or actuator applications is very common with the trend of replacing the traditional DC with BLDC motors. In most automotive applications, detection of fault conditions of the BLDC motor and the control electronics is mandatory. For this reason, the control electronics should be able to identify a possible fault condition and then apply counter measures, e.g., in order to protect the system. Often, the detected fault condition is reported to a system controller and may be accessible via the diagnosis interface of the automobile for further service investigations.
As disclosed, e.g., in the Italian patent application IT102016000009376, a motor is often driven by using one or more half-bridges as a function of one or more respective Pulse-Width Modulated (PWM) signals.
For example, FIG. 1 shows a typical half-bridge arrangement 20 comprising two electronic switches SW1 and SW2, such as n-channel power Field-Effect Transistors (FETs), such as Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs), connected in series between supply voltage Vdd and ground GND.
Usually, the switches SW1 and SW2 are closed alternatively in order to connect the output OUT of the half-bridge arrangement 20, i.e., the intermediate point between the switches SW1 and SW2, either to the voltage Vdd or to ground GND. For this purpose, the half-bridge is driven as a function of two drive signals DRV1 and DRV2, which are connected (e.g., directly) to the control gates of the switches SW1 and SW2, respectively. Specifically, in order to correctly drive the control gates, often a high-side driver 2001 is used to generate the drive signal DRV1 for the high-side switch SW1 as a function of a first control signal IN1, and a low-side driver 2002 is used to generate the drive signal DRV2 for the low-side switch SW2 as a function of a control signal IN2. The control signal IN2 corresponds often to an inverted version of the signal IN, (or vice versa), i.e., the signal IN2 is low when the signal IN1 is high and vice versa. For example, in FIG. 1, inverter 202 is used, which receives at an input the signal IN1 and provides at an output the signal IN2.
The output OUT of the half-bridge arrangement 20 may be used to drive a load. For example, in FIG. 1, the half-bridge arrangement 20 drives a motor M1 connected between the output OUT of the half-bridge arrangement 20 and ground GND.
Conversely, FIG. 2 shows an example in which two half-bridge arrangements 20a and 20b are used to drive a linear motor M2, such as a voice coil motor, connected between the output OUTa of the first bridge arrangement 20a and the output OUTb of the second bridge arrangement 20b. As well known to those of skill in the art, in this case, also the rotation direction of the motor M2 may be controlled by applying appropriate control signals INa and INb to the half-bridge arrangements 20a and 20b.
Finally, FIG. 3 shows an example in which three half-bridge arrangements 20a, 20b and 20c are used to drive a three-phase motor M3, such as a spindle motor, connected between the outputs OUTa, OUTb and OUTc of three half-bridge arrangements 20a, 20b and 20c.
As mentioned before, the control signals may be PWM signals, i.e., signals with a fixed frequency and a variably duty cycle. For example, Italian patent application IT102015000046790 discloses a solution for generating two PWM signals which may be used, e.g., for generating the signals INa and INb in the solution shown in FIG. 2.
FIG. 4 shows in this respect a typical PWM signal, in particular the signal IN1, corresponding to a pulsed signal comprising a single pulse P for each switching cycle with duration or period TPWM, wherein the switch-on duration TON1 of the pulse P may be variable.
Generally, the pulse P is not necessarily at the beginning of each switching cycle, but each switching cycle may comprise an initial switch-off period TOFFa before the pulse P and a final switch-off period TOFFb after the pulse P, with:TPWM1=TOFFa+TON1+TOFFb   (1)with the switch-off duration TOFF1 being:TOFF1=TOFFa+TOFFb   (2)wherein the duty cycle D of the signal IN1 for each switching cycle is given by:D=TON1/TPWM   (3)
For example, in most high-end automotive applications (e.g., Electric Power Steering, Electric Turbo Charge, etc.), a Smart Power Device (SPD) is used to generate the drive signals for the high side and low side switches (SW1/SW2) in order to drive, e.g., a three-phase BLDC motor. A typical SPD device is the integrated circuit (IC) STMicroelectronics L9907, as described e.g., in “L9907-Automotive FET driver for 3 phase BLDG motor—Datasheet—production data”, March 2017, DocID029666 Rev 1, which is incorporated herein by reference.
FIG. 5 schematically shows the structure of such an IC 22. Specifically, this IC 22 is able to receive at respective inputs six control signals IN1 . . . IN6 and generate at respective outputs six drive signals DRV1 . . . DRV6.
For example, as shown in FIG. 6, the IC 22 may be connected to a signal generator 30, such as a microcontroller, configured to generate the control signals IN1 . . . IN6. Accordingly, the IC 22 comprises three high side drivers 2001, 2003 and 2005 configured to generate respective drive signals DRV1, DRV3 and DRV5 for three high side switches SW1, SW3 and SW5 and three low side drivers 2002, 2004 and 2006 configured to generate respective drive signals DRV2, DRV4 and DRV6 for three low side switches SW2, SW4 and SW6.
Often, such a SPD device 22 comprises also an electronic converter 204 configured to generate the supply voltage Vdd for the half-bridges as a function of a power supply, such as a battery voltage VBAT.
Moreover, often the IC 22 comprises differential amplifiers 206 arranged to measure the motor phase currents. Specifically, the L9907 IC comprises two differential amplifiers 2061 and 2062 arranged to generate two measurement signals CS1 and CS2 by measuring the current flowing through two motor phases, e.g., by using respective shunt resistors RS1 and RS2 connected in series with a respective motor phase. For example, as shown in FIG. 6, the measurements signals CS1 and CS2 may then be provided to the circuit 30, which may calculate the current of the third motor phase via Kirchhoff s law. Specifically, the circuit 30 may generate the six PWM signals IN1 . . . IN6 for the inputs of the IC 22 and synchronously monitor the two measurement signals CS1, CS2 at the output of the IC 22.
Accordingly, in the solution shown in FIG. 6, the signal generator 30 generates for each half-bridge two separate control signals for the high side and the low side switches, e.g., signals IN1 and IN2, while the solution shown in FIG. 1 uses a single signal IN1 and an inverter 202 in order to generate the complementary signal IN2. Specifically, as shown in FIG. 4, in this way the signal generator 20 may generate a control signal IN2 having a given switching period corresponding usually to the switching period TPWM. However, the switch-on period TON2 of the signal IN2 may not correspond directly to the switch-off period TOFF1 of the signal IN1 (as in FIG. 1), but the signal generator 30 may introduce delays, i.e.:
a delay TONDT between the instant when the low side control signal IN2 goes to low and the instant when the high side control signal IN1 goes to high; and
a delay TOFFDT between the instant when the high side control signal IN1 goes to low and the instant when the low side control signal IN2 goes to high.
Accordingly, usually the signal generator 30 is configured to generate a control signal IN2 with:TON2=TOFF1−TONDT−TOFFDT   (4)TOFF2=TON1+TONDT+TOFFDT   (5)
For example, the delays TONDT and TOFFDT may depend on the type of the electronic switches SW1 and SW2, etc.
Thus, the solution shown in FIG. 6 is more flexible, but additional control signals are required, rendering the solution more complex.